Semiconductor wafers are conventionally formed with a notch to orient the wafers and provide a reference for wafer handling machinery. Processes for forming the notch typically involve grinding a surface of the wafer or the ingot. These processes adversely affect semiconductor process performance. For example, uniformity of the thickness of a photoresist coating, or chemical mechanical polishing (CMP) film thickness, across the surface of the wafer can be degraded by the presence of the notch. Plasma density and chemical distribution for etching processes can also be adversely impacted by the notch. Additional costs are associated with compensating for these degradations in process performance. The notch is also a particle source resulting in wafer contamination (especially during high vacuum processes), equipment damage, and additional preventative maintenance requirements to avoid equipment damage.